Acelogic
31dd19d4f8
Move compat/ans.c's top-level ranges verbatim into
compat/ans/{nvme_model,sptm_dma}.c and #include them from ans.c in
their original order. ans.c keeps its header comment, include, layout
assertions, the ANS_ORDER barrier and the NVMe register and status
macros. Cuts fall only between top-level definitions; every part has
balanced conditionals.
No tool reads ans.c as text: tools/test-nvme-async.py compiles and
preprocesses it, which follows the includes, and the tools that pin
monitor sources already hash every part (first commit of this series).
Verification (base 84dd208 vs this commit):
- clang -c with the qualification flags (no -flto) and with
probes/run.py FLAGS, each plus -I shadow -I q1n1/platform/uefi:
compat/ans.c objects byte-identical (cmp). PASS
- Qualification flags with -flto: llvm-dis output equal; the full IR
differs only in 2 inline-asm !srcloc source-location cookies (the
ANS_ORDER barrier). PASS
- probes/run.py build('xnuboot') with the qualification flags:
xnuboot.bin unchanged (sha256 0d8b9ec3...). PASS
- tools/test-ans.c host harness (ASan/UBSan, -DANS_HOST) on both trees:
"402324 checks, 0 failures". PASS
- Reconstruction from the parts reproduces ans.c exactly.
- Host subset (23 commands, including test-nvme-async), 300 s limit:
every outcome equal to base 84dd208. No new failure.
- wc -l: ans.c 34, parts 472 and 508 lines.
35 lines
1.6 KiB
C
35 lines
1.6 KiB
C
/* SPDX-License-Identifier: MIT */
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/* Virtual ANS2 (compat/ans.h). Compact by design: the monitor has a fixed
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* code budget, and every branch here is a guest-reachable contract. */
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#include "ans.h"
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_Static_assert(sizeof(struct ans_state) <= ANS_STATE_BYTES, "state fits its reservation page");
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_Static_assert(ANS_FW_OFFSET >= ANS_STATE_BYTES && ANS_DISK_OFFSET >= ANS_FW_OFFSET + 0x4000,
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"reservation layout: state, one reserved zero page, disk");
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#if defined(__aarch64__) && !defined(ANS_HOST)
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#define ANS_ORDER() __asm__ volatile("dmb ish" ::: "memory")
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#else
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#define ANS_ORDER() __asm__ volatile("" ::: "memory")
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#endif
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#define CAP_LO 0x14010040u /* TO 20 (10 s), CQR, MQES 0x40 (65 entries) */
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#define CAP_HI 0x00000020u /* CSS NVM (bit 37); MPSMIN/MPSMAX 4 KiB, DSTRD 0 */
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#define VERSION 0x00010100u /* "NVMe Revision Supported" 1.10 */
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#define BOOT_OK 0xde71ce55u /* WaitDeviceActive (IONVMeFamily 0x1f190) */
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#define STATUS_INVALID_OPCODE 0x01
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#define STATUS_INVALID_FIELD 0x02
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#define STATUS_INVALID_NS 0x0b
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#define STATUS_LBA_RANGE 0x80
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#define STATUS_WRITE_PROTECTED 0x20 /* Namespace is Write Protected */
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#define STATUS_READ_ERROR 0x281 /* SCT 2: Unrecovered Read Error */
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#define STATUS_AER_LIMIT 0x105
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#define STATUS_CQ_INVALID 0x100 /* SCT 1: Completion Queue Invalid */
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#define STATUS_QID 0x101 /* Invalid Queue Identifier */
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#define STATUS_QSIZE 0x102 /* Invalid Queue Size */
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#define STATUS_IV 0x108 /* Invalid Interrupt Vector */
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#define STATUS_QDELETE 0x10c /* Invalid Queue Deletion */
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#include "ans/nvme_model.c"
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#include "ans/sptm_dma.c"
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