Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
98 lines
3.7 KiB
C
98 lines
3.7 KiB
C
/* SPDX-License-Identifier: MIT */
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#include "ipi.h"
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#ifndef SNAP_FAST_IPI
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#define SNAP_FAST_IPI 0
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#endif
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#if SNAP_FAST_IPI
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/* Other CPUs post and acknowledge without the service token (compat/fast-ipi.h,
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* docs/FAST-IPI-20261019.md): the shared words change atomically here too. */
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#include "fast-ipi.h"
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#define IPI_PENDING(x) __atomic_load_n(&x->pending,__ATOMIC_RELAXED)
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#else
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#define IPI_PENDING(x) x->pending
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#endif
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static enum ipi_result request_target(uint64_t mpidr,uint64_t reg,int read,
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uint64_t value,uint64_t *target)
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{
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if (read) return IPI_BAD_DIRECTION;
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uint64_t allowed=reg==IPI_RR_LOCAL ? 0xff : 0xff00ff;
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if(value & ~allowed) return IPI_BAD_VALUE;
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*target=(value&0xff) | (reg==IPI_RR_LOCAL ?
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(mpidr&0xff00) : ((value>>8)&0xff00));
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return IPI_OK;
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}
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static void request(struct guest_ipi *ipi,uint64_t value)
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#if SNAP_FAST_IPI
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{fast_ipi_post(ipi,value);}
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#else
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{
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ipi->coalesced+=ipi->pending;
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ipi->pending=1;ipi->requests++;ipi->last_request=value;
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}
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#endif
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enum ipi_result guest_ipi_access(struct guest_ipi *ipi,uint64_t mpidr,
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uint64_t reg,int read,uint64_t *value)
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{
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if(reg!=IPI_RR_LOCAL && reg!=IPI_RR_GLOBAL && reg!=IPI_SR) return IPI_UNHANDLED;
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/* The selected guest topology has only cluster/core affinity levels.
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* Ignore architectural MPIDR non-affinity bits, including bit 31. */
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if(!ipi || !value || (read!=0 && read!=1) || IPI_PENDING(ipi)>1 ||
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(mpidr & UINT64_C(0xff00ff0000))) return IPI_BAD_CONFIG;
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if(reg==IPI_SR) {
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#if SNAP_FAST_IPI
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if(read) { *value=__atomic_load_n(&ipi->pending,__ATOMIC_ACQUIRE);ipi->reads++; }
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else {
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if(*value & ~UINT64_C(1)) return IPI_BAD_VALUE;
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if(*value) fast_ipi_acknowledge(ipi);
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}
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#else
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if(read) { *value=ipi->pending;ipi->reads++; }
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else {
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if(*value & ~UINT64_C(1)) return IPI_BAD_VALUE;
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if(*value && ipi->pending) { ipi->pending=0;ipi->acks++; }
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}
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#endif
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return IPI_OK;
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}
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uint64_t target;
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enum ipi_result result=request_target(mpidr,reg,read,*value,&target);
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if(result!=IPI_OK) return result;
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if(target!=(mpidr&0xffff)) return IPI_BAD_TARGET;
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request(ipi,*value);
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return IPI_OK;
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}
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enum ipi_result guest_ipi_route(struct guest_ipi *const states[],
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const uint64_t affinities[],unsigned count,uint64_t runnable,unsigned source,
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uint64_t reg,int read,uint64_t *value)
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{
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if(reg!=IPI_RR_LOCAL && reg!=IPI_RR_GLOBAL && reg!=IPI_SR) return IPI_UNHANDLED;
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if(!states || !affinities || !value || !count || count>64 || source>=count ||
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(count<64 && runnable>>count) || !(runnable&(UINT64_C(1)<<source)) ||
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(read!=0 && read!=1)) return IPI_BAD_CONFIG;
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for(unsigned i=0;i<count;i++) {
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if(!states[i] || IPI_PENDING(states[i])>1 || (affinities[i]&UINT64_C(0xff00ff0000)))
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return IPI_BAD_CONFIG;
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for(unsigned j=0;j<i;j++) if(states[i]==states[j] ||
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(affinities[i]&0xffff)==(affinities[j]&0xffff)) return IPI_BAD_CONFIG;
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}
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if(reg==IPI_SR) return guest_ipi_access(states[source],affinities[source],reg,read,value);
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uint64_t target;
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enum ipi_result result=request_target(affinities[source],reg,read,*value,&target);
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if(result!=IPI_OK) return result;
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for(unsigned i=0;i<count;i++) if((affinities[i]&0xffff)==target) {
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if(!(runnable&(UINT64_C(1)<<i))) return IPI_BAD_TARGET;
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request(states[i],*value);
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return IPI_OK;
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}
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return IPI_BAD_TARGET;
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}
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uint64_t guest_ipi_poll_delay(uint64_t host_hz,uint64_t budget)
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{
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uint64_t ticks=host_hz/1000+(host_hz%1000!=0);
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return ticks<budget ? ticks : budget;
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}
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int guest_ipi_fiq(const struct guest_ipi *ipi,int timer_pending)
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{
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return timer_pending || (ipi && IPI_PENDING(ipi));
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}
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