Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
31 lines
1.0 KiB
C
31 lines
1.0 KiB
C
/* SPDX-License-Identifier: MIT */
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#include "panic-state.h"
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void sptm_panic_init(struct sptm_panic_state *s)
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{
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s->triggered=0;s->owner=SPTM_PANIC_NO_OWNER;s->phase=0xff;
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s->entries=s->rejected=0;
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for(unsigned cpu=0;cpu<6;cpu++)s->cpu_entries[cpu]=0;
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}
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static int valid(const struct sptm_panic_state *s)
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{
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return s && ((!s->triggered && s->owner==SPTM_PANIC_NO_OWNER && s->phase==0xff) ||
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(s->triggered==1 && s->owner<6 && s->phase==1));
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}
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int sptm_panic_enter(struct sptm_panic_state *s,unsigned cpu)
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{
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if(!valid(s) || cpu>=6 || s->entries==UINT64_MAX || s->cpu_entries[cpu]==UINT64_MAX)return 0;
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s->triggered=1;
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if(s->owner==SPTM_PANIC_NO_OWNER)s->owner=cpu;
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if(s->phase==0xff)s->phase=1;
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s->entries++;s->cpu_entries[cpu]++;
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return 1;
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}
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int sptm_panic_dispatch(struct sptm_panic_state *s,unsigned cpu,uint64_t x16)
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{
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if(!valid(s) || cpu>=6)return 0;
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if(!s->triggered || x16==UINT64_C(0x0200000000000000))return 1;
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if(s->rejected!=UINT64_MAX)s->rejected++;
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return 0;
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}
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