Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
76 lines
3.7 KiB
C
76 lines
3.7 KiB
C
/* SPDX-License-Identifier: MIT */
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/* The monitor's appended performance state (probes/xnuboot.c, struct
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* context.perf), present in every build so host layout readers see one
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* context size; its counters stay zero unless SNAP_FAST_VCPU_TRAPS,
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* SNAP_SYSREG_CENSUS, SNAP_INCREMENTAL_PUBLISH, SNAP_CANONICAL_VIEW_FAST,
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* SNAP_VECTOR_BRANCH or SNAP_FAST_CROSSINGS is on. (struct exit_profile,
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* below, is the one opt-in exception: see its comment.)
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* tools/perf_counters.py decodes it from the bytes at
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* context + offsetof(context, perf). */
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#pragma once
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#include "cpu.h"
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#include "fast-trap.h"
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#include "service-profile.h"
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#include "sptm-root.h"
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#include "../shadow/root-publish-index.h"
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struct canonical_view_perf {
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struct sptm_view_mapped_stats mapped;
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uint64_t sampled,mismatches; /* reference re-walks (1 in 64); must stay 0 */
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};
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struct perf_state {
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struct fast_trap_cpu fast[GUEST_CPU_COUNT];
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struct sysreg_census_cpu census[GUEST_CPU_COUNT];
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struct root_publish_index root_index;
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struct canonical_view_perf canonical;
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};
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/* The exit profile: appended after every other field of struct context, and
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* only when SNAP_FAST_EL0_SYSREG or SNAP_SERVICE_SUBCLASS is on. It fits in
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* the context's last page, before the 4K-aligned table arena, and
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* probes/xnuboot.c asserts that the arena does not move, so define-free
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* layout readers (tools/monitor_layout.py, probes/run.py's arena base) still
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* agree on every offset; tools/perf_counters.py decode_exit_profile reads it
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* with the build defines. Zero unless its define is on.
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*
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* Per lock-free exit class, timing[] holds (exits << FAST_EXIT_COUNT_SHIFT) +
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* the CNTPCT ticks from the end of sync_lower's register save to the end of
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* xnuboot_pauth_resume (the EL0 key reload included; the hardware exception,
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* the register save/restore and the ERET excluded). Slots 0..10 are the
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* fast-trap classes 1..11 (compat/fast-trap.h), slots 11..17 the boundary
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* classes 1..7 (compat/fast-vector.h, 7 = the EL0 emulation). One add per
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* exit: the 36-bit tick field holds over 59 minutes of 19.2 MHz exits per
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* class and CPU, the 28-bit count 268 million; an exit of 2^32 ticks or
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* more is counted in slow instead. */
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#define FAST_EXIT_CLASSES 18u
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#define FAST_EXIT_TRAP_SLOT(cls) ((cls) - 1u)
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#define FAST_EXIT_CROSS_SLOT(cls) ((cls) + 10u)
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#define FAST_EXIT_COUNT_SHIFT 36
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#define FAST_EXIT_TICK_LIMIT (UINT64_C(1) << 32)
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struct fast_exit_cpu {
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uint64_t el0[4]; /* SNAP_FAST_EL0_SYSREG: emulated counter, emulated UPERM,
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* declined other word, declined by a guard */
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uint64_t timing[FAST_EXIT_CLASSES]; /* SNAP_SERVICE_SUBCLASS, see above */
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uint64_t slow; /* ...exits of FAST_EXIT_TICK_LIMIT ticks or more */
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uint64_t max; /* ...the longest exit charged, in ticks */
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} __attribute__((aligned(64)));
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_Static_assert(sizeof(struct fast_exit_cpu) == 192, "three cache lines per CPU");
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struct exit_profile {
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struct service_sub_profile sub; /* SNAP_SERVICE_SUBCLASS, under the lock */
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struct fast_exit_cpu cpu[GUEST_CPU_COUNT]; /* written by that CPU only */
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};
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/* One lock-free exit, charged by its own CPU; mark is frame slot 31: the
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* class slot + 1 in the top byte over the start tick. */
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static inline void fast_exit_charge(struct fast_exit_cpu *p, uint64_t mark, uint64_t now)
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{
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uint64_t slot = mark >> 56, ticks = (now - mark) & ((UINT64_C(1) << 56) - 1);
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if (!slot || slot > FAST_EXIT_CLASSES) return;
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if (ticks >= FAST_EXIT_TICK_LIMIT) { p->slow++; return; }
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p->timing[slot - 1] += (UINT64_C(1) << FAST_EXIT_COUNT_SHIFT) + ticks;
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if (ticks > p->max) p->max = ticks;
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}
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static inline uint64_t fast_exit_mark(uint64_t start, unsigned slot)
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{
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return (start & ((UINT64_C(1) << 56) - 1)) | ((uint64_t)(slot + 1) << 56);
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}
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