Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
56 lines
1.1 KiB
ArmAsm
56 lines
1.1 KiB
ArmAsm
/* SPDX-License-Identifier: MIT */
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/* Freestanding compiler runtime. Touch exactly n bytes; never overread a
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* page boundary. EL2 may require aligned accesses, so wide accesses are used
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* only after proving both pointers aligned. No SIMD or guest register state. */
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.text
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.p2align 2
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.global memcpy
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.type memcpy, %function
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memcpy:
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mov x3, x0
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orr x4, x0, x1
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tst x4, #7
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b.ne 2f
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1: cmp x2, #8
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b.lo 2f
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ldr x4, [x1], #8
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str x4, [x3], #8
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sub x2, x2, #8
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b 1b
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2: cbz x2, 4f
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3: ldrb w4, [x1], #1
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strb w4, [x3], #1
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subs x2, x2, #1
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b.ne 3b
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4: ret
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.size memcpy, .-memcpy
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.p2align 2
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.global memset
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.type memset, %function
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memset:
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mov x3, x0
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and w1, w1, #255
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cbz x2, 4f
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1: tst x3, #7
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b.eq 2f
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strb w1, [x3], #1
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subs x2, x2, #1
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b.ne 1b
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ret
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2: orr x1, x1, x1, lsl #8
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orr x1, x1, x1, lsl #16
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orr x1, x1, x1, lsl #32
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3: cmp x2, #8
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b.lo 5f
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str x1, [x3], #8
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sub x2, x2, #8
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b 3b
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4: ret
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5: cbz x2, 4b
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6: strb w1, [x3], #1
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subs x2, x2, #1
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b.ne 6b
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ret
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.size memset, .-memset
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