Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
54 lines
3.3 KiB
C
54 lines
3.3 KiB
C
/* SPDX-License-Identifier: MIT */
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#pragma once
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#include "sprr-view.h"
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/* SNAP_NATIVE_TABLES user variants (docs/NATIVE-TABLES-DESIGN-20260929.md).
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*
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* A user canonical 4K shadow keeps Apple's raw descriptors and is never
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* installed. Its two permission variants are: w=0 (TPRO pages read-only) and
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* w=1 (TPRO pages writable). Each is the canonical tree with its own copy of
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* the root and of every table on a path to a class 9 leaf; every other table
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* is the canonical one, shared by both variants and by every CPU.
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*
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* Storage is struct sprr_views with copy[w] for w=0/1; copy[2..5] stay zero.
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* The translation is sprr-view.c's user decode with the governing permission
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* fixed to "TPRO write = w": fixed native classes pass through unchanged, a
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* class 9 leaf becomes EL0-accessible, never executable, read-only unless w,
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* and a table pointer names the child's copy when the child has copies.
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*
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* Exactness is maintained per store: every canonical store is followed by
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* native_views_store(), which rewrites the same entry of both copies when the
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* table has copies (O(1)) and refuses a raw class 9 leaf in any table without
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* copies, so hardware can never reach one through a shared table. A new class
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* 9 path is created by native_views_prepare_leaf() BEFORE its leaf is stored;
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* the caller then invalidates walk caches for that VA before the store.
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*
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* umprr is the root's UMPRR (sprr_root_reset): class 9 needs field9 = 0x40000.
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* The caller serializes every call per address space. alloc returns fresh,
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* zeroed pages that alias nothing; write stores into copies only. */
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#define NATIVE_VARIANTS 2u
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int native_views_init(struct sprr_views *,const struct shadow *,uint64_t umprr);
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uint64_t native_views_root(const struct sprr_views *,unsigned w);
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/* Index of the copied table whose source is `table`, or -1. */
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int native_views_find(const struct sprr_views *,uint64_t table);
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/* Copy the path to `va` (4K aligned) where missing and link it into the
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* existing copies. Returns 1 when nothing was added, 2 when a path was
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* linked (the caller must then invalidate walk caches for va before storing
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* a class 9 leaf there), 0 on failure. The canonical level-3 entry for va may
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* be empty or a valid page. */
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int native_views_prepare_leaf(struct sprr_views *,const struct shadow *,uint64_t va,uint64_t umprr);
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/* Before a canonical store of `value` at `pa`: nonzero unless it would put a
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* raw class 9 leaf into a table without copies, or a value with no
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* translation into a table with copies. O(copied tables). */
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int native_views_admit(const struct sprr_views *,uint64_t pa,uint64_t value,uint64_t umprr);
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/* After the canonical store of `value` at `pa`. */
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int native_views_store(struct sprr_views *,const struct shadow *,uint64_t pa,uint64_t value,
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uint64_t umprr);
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/* Build every missing class 9 path and translate every copy from scratch.
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* For a tree no CPU runs yet (after a build). */
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int native_views_sync(struct sprr_views *,const struct shadow *,uint64_t umprr);
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/* Audit: every class 9 leaf lies on a copied path, and every copied entry
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* equals the translation of its canonical source. Read-only. */
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int native_views_verify(const struct sprr_views *,const struct shadow *,uint64_t umprr);
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/* The second half alone (no walk of the whole canonical tree): cheap. */
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int native_views_exact(const struct sprr_views *,const struct shadow *,uint64_t umprr);
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