Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
76 lines
3.9 KiB
C
76 lines
3.9 KiB
C
/* SPDX-License-Identifier: MIT */
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#include "clock.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#define CHECK(x) do { checks++; if (!(x)) { fprintf(stderr,"FAIL %d: %s\n",__LINE__,#x); exit(1); } } while(0)
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static unsigned checks;
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static uint64_t random_state=0x6ac13b72d958;
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static uint64_t next_random(void)
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{ random_state^=random_state<<13; random_state^=random_state>>7; random_state^=random_state<<17; return random_state; }
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int main(void)
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{
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const uint32_t hz[][2]={{19200000,24000000},{24000000,19200000},
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{19200000,19200000},{100000000,24000000},{32768,24000000},
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{1,UINT32_MAX},{UINT32_MAX,1},{UINT32_MAX,UINT32_MAX-1}};
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for(unsigned i=0;i<sizeof(hz)/sizeof(hz[0]);i++) {
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struct clock_rate r;
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CHECK(clock_rate_init(&r,hz[i][0],hz[i][1])==0);
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for(unsigned j=0;j<2000;j++) {
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uint64_t raw=next_random();
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__uint128_t exact=(__uint128_t)raw*r.guest_hz/r.host_hz;
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CHECK(clock_rate_sample(&r,raw)==(uint64_t)exact);
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uint64_t delta=next_random()%1000000000+1;
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uint64_t budget=next_random()%1000000000;
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__uint128_t due=((exact+delta)*r.host_hz+r.guest_hz-1)/r.guest_hz;
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__uint128_t ticks=due-raw;
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uint64_t want=ticks<budget?(uint64_t)ticks:budget;
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CHECK(clock_rate_wait(&r,raw,(uint64_t)exact+delta,budget)==want);
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if (ticks < UINT64_MAX) {
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uint64_t boundary=(uint64_t)ticks;
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CHECK(clock_rate_wait(&r,raw,(uint64_t)exact+delta,boundary)==boundary);
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CHECK(clock_rate_wait(&r,raw,(uint64_t)exact+delta,boundary+1)==boundary);
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if (boundary)
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CHECK(clock_rate_wait(&r,raw,(uint64_t)exact+delta,boundary-1)==boundary-1);
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}
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CHECK(clock_rate_wait(&r,raw,(uint64_t)exact,budget)==0);
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CHECK(clock_rate_wait(&r,raw,(uint64_t)exact-1,budget)==0);
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}
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}
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struct clock_rate r={3,5}, saved=r;
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struct clock_rate slow={UINT32_MAX,1};
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CHECK(clock_rate_wait(&slow,UINT32_MAX-2,1,5)==2);
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CHECK(clock_rate_wait(&slow,UINT32_MAX-2,1,1)==1);
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CHECK(clock_rate_wait(&slow,1,INT64_MAX,UINT64_MAX)==UINT64_MAX);
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CHECK(clock_rate_init(0,1,1)<0);
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CHECK(clock_rate_init(&r,0,1)<0 && !memcmp(&r,&saved,sizeof(r)));
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CHECK(clock_rate_init(&r,1,0)<0 && !memcmp(&r,&saved,sizeof(r)));
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CHECK(clock_rate_init(&r,1UL<<32,1)<0 && !memcmp(&r,&saved,sizeof(r)));
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CHECK(clock_rate_init(&r,1,1UL<<32)<0 && !memcmp(&r,&saved,sizeof(r)));
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for(unsigned bit=0;bit<16;bit++) for(unsigned direction=0;direction<2;direction++) {
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struct guest_event event={0};
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uint64_t control=4 | direction*8 | bit*16;
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uint64_t now=UINT64_MAX-0x40000, expected=now;
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guest_event_configure(&event,control,now);
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/* Independent reference: find the selected bit edge one tick at a time. */
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do { expected++; } while (((expected>>bit)&1)==(((expected-1)>>bit)&1) ||
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((expected>>bit)&1)==direction);
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CHECK(guest_event_wait(&event,now,UINT64_MAX)==expected-now);
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CHECK(!guest_event_consume(&event,expected-1));
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CHECK(guest_event_consume(&event,expected));
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CHECK(!guest_event_consume(&event,expected));
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uint64_t period=1UL<<(bit+1);
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CHECK(guest_event_wait(&event,expected,UINT64_MAX)==period);
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/* Coalescing, wrapping time, and a pending event surviving disable. */
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now=expected+period*40;
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CHECK(guest_event_wait(&event,now,10)==0);
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guest_event_configure(&event,0,now);
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CHECK(guest_event_consume(&event,now));
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CHECK(!guest_event_consume(&event,now+period));
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CHECK(guest_event_wait(&event,now+period,100)==100);
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guest_event_configure(&event,control,now+period);
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CHECK(guest_event_wait(&event,now+period,1)==1);
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}
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printf("PASS: %u clock rate/event checks\n",checks);
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}
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