Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
36 lines
1.5 KiB
C
36 lines
1.5 KiB
C
/* SPDX-License-Identifier: MIT */
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#include <assert.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include "cpu-runtime.h"
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int main(void)
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{
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struct guest_cpu_storage plan[GUEST_CPU_COUNT],before[GUEST_CPU_COUNT];
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const uint64_t begin=UINT64_C(0xbb7b8000),span=4096+5*UINT64_C(0x12000);
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uint64_t end=0;
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assert(guest_cpu_storage_plan(begin,begin+span,plan,&end)==0);
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assert(end==begin+span);
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assert(plan[0].vncr==begin && !plan[0].output && !plan[0].stack_low && !plan[0].stack_high);
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uint64_t cursor=begin+4096;
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for (unsigned n=1;n<GUEST_CPU_COUNT;n++) {
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assert(plan[n].vncr==cursor);cursor+=4096;
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assert(plan[n].output==cursor);cursor+=4096;
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assert(plan[n].stack_low==cursor);cursor+=65536;
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assert(plan[n].stack_high==cursor);
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}
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assert(cursor==end);
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memcpy(before,plan,sizeof(plan));
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const uint64_t bad[][2]={{0,0x100000},{begin+1,begin+span},{begin,begin+span-1},
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{begin,begin+span-4096},{begin,begin},{begin,begin-4096},
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{UINT64_MAX&~4095ULL,UINT64_MAX&~4095ULL}};
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for(unsigned n=0;n<sizeof(bad)/sizeof(*bad);n++) {
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assert(guest_cpu_storage_plan(bad[n][0],bad[n][1],plan,&end)!=0);
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assert(!memcmp(plan,before,sizeof(plan)) && end==begin+span);
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}
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assert(guest_cpu_storage_plan(begin,begin+span,NULL,&end)!=0);
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assert(guest_cpu_storage_plan(begin,begin+span,plan,NULL)!=0);
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puts("PASS: six private VNCR pages and five runtime banks; bounds, overflow and atomic failure");
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}
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