Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
59 lines
3.2 KiB
C
59 lines
3.2 KiB
C
/* SPDX-License-Identifier: MIT */
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#include "native-call.h"
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#include <stdio.h>
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#include <stdlib.h>
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#define CHECK(x) do { checks++; if (!(x)) { fprintf(stderr,"FAIL %d: %s\n",__LINE__,#x);exit(1); } } while(0)
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static unsigned checks;
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int main(void)
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{
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const uint64_t pc=UINT64_C(0xfffffe000c22a004);
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const uint32_t words[]={0x00201420,0xd4e00000};
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for(unsigned op=0;op<2;op++)for(unsigned sp=0;sp<2;sp++) {
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for(unsigned flags=0;flags<65536;flags++) {
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/* Exhaust all combinations of NZCV, DAIF and representative
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* upper PSTATE flags, always excluding IL and debug-step state. */
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uint64_t saved=(8+sp) | ((uint64_t)(flags&255)<<6) |
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((uint64_t)(flags>>8)<<24),physical=0;
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uint64_t vector=sp?0x200:0;
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CHECK(native_call_return(vector,1UL<<25,saved,0x3c5,pc,words[op],&physical));
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CHECK(physical==((saved&~12UL)|4));
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}
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uint64_t saved=UINT64_C(0xa00003c8)+sp,physical=UINT64_MAX;
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uint64_t vector=sp?0x200:0;
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CHECK(!native_call_return(vector^0x200,1UL<<25,saved,0x3c5,pc,words[op],&physical));
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CHECK(physical==UINT64_MAX);
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CHECK(!native_call_return(vector,0,saved,0x3c5,pc,words[op],&physical));
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CHECK(!native_call_return(vector,(1UL<<25)|1,saved,0x3c5,pc,words[op],&physical));
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for(unsigned mode=0;mode<32;mode++)if(mode!=8+sp)
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CHECK(!native_call_return(vector,1UL<<25,(saved&~31UL)|mode,0x3c5,pc,words[op],&physical));
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for(unsigned entry=0;entry<32;entry++)if(entry!=5)
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CHECK(!native_call_return(vector,1UL<<25,saved,entry,pc,words[op],&physical));
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for(unsigned bit=20;bit<=21;bit++)
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CHECK(!native_call_return(vector,1UL<<25,saved|(1UL<<bit),0x3c5,pc,words[op],&physical));
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CHECK(!native_call_return(vector,1UL<<25,saved|(1UL<<32),0x3c5,pc,words[op],&physical));
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CHECK(!native_call_return(vector,1UL<<25,saved,0x3c5,0x1000,words[op],&physical));
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CHECK(!native_call_return(vector,1UL<<25,saved,0x3c5,pc+1,words[op],&physical));
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CHECK(!native_call_return(vector,1UL<<25,saved,0x3c5,pc,0xd503201f,&physical));
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CHECK(!native_call_return(vector,1UL<<25,saved,0x3c5,pc,words[op],0));
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}
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for(unsigned reg=0;reg<32;reg++) {
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CHECK(native_exception_writer(0xd5184000|reg));
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CHECK(native_exception_writer(0xd5184020|reg));
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CHECK(!native_exception_writer(0xd5384000|reg));
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CHECK(!native_exception_writer(0xd5384020|reg));
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}
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CHECK(sizeof(struct native_call_state)==96);
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for(unsigned ec=0;ec<64;ec++)for(unsigned private_call=0;private_call<2;private_call++)
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CHECK(native_call_snapshot_required((uint64_t)ec<<26,private_call)==
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(ec==0x30 || ec==0x32 || (ec==0x20 && !private_call)));
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for(unsigned rt=0;rt<32;rt++)for(unsigned read=0;read<2;read++) {
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uint64_t esr=(UINT64_C(0x18)<<26)|(UINT64_C(1)<<25)|(rt<<5)|read;
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CHECK(native_call_snapshot_required(esr|0x301404,0)==!read);
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CHECK(native_call_snapshot_required(esr|0x301800,0)==!read);
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CHECK(!native_call_snapshot_required(esr|0x301000,0));
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CHECK(!native_call_snapshot_required(esr|0x300000,0));
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}
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printf("PASS %u native-call return-mode, PSTATE and refusal checks\n",checks);
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return 0;
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}
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