Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
134 lines
5.8 KiB
C
134 lines
5.8 KiB
C
/* SPDX-License-Identifier: MIT */
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/* Voter/RMBS/boost/BWR enables, separate from votes and completion. */
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "device.h"
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static unsigned checks;
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#define CHECK(x) do { checks++; if (!(x)) { \
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fprintf(stderr,"line %u: %s\n",__LINE__,#x); exit(1); } } while (0)
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static struct device_state state,saved,other;
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static const struct device_model model={DEVICE_PMC_ENABLE_POLICY_V1,
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0x3028ac000,0x1000,{0,0,0,0,0}};
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static const unsigned offsets[]={0,4,8,12,0x24,0x28,0x20};
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static const unsigned masks[]={15,15,15,15,3,0x3f,7};
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static enum device_result access_word(unsigned off,unsigned width,int write,uint64_t *v)
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{
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return device_model_access_state(&model,&state,off,width,write,v);
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}
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int main(int argc,char **argv)
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{
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CHECK(device_models_valid(&model,1,0,0));
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CHECK(device_model_start(&model,&state,0,24000000)==DEVICE_OK);
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if (argc==2 && !strcmp(argv[1],"--masks")) {
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for (unsigned off=0;off<0x1000;off+=4) {
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uint64_t v=0,mask=0;
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if (access_word(off,4,0,&v)!=DEVICE_OK) continue;
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for (unsigned bit=0;bit<64;bit++) {
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v=1UL<<bit;
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if (access_word(off,4,1,&v)==DEVICE_OK) mask|=1UL<<bit;
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}
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printf("%u %llu\n",off,(unsigned long long)mask);
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}
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return 0;
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}
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/* restorePMC enables static PMP, CLPC, AP (bits 0, 1, 3) on all four
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* rails. Each read/modify/write must preserve previous voters/rails. */
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const unsigned static_bits[]={0,1,3};
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for (unsigned pass=0;pass<2;pass++) for (unsigned voter=0;voter<3;voter++) {
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for (unsigned rail=0;rail<4;rail++) {
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uint64_t v=UINT64_MAX;saved=state;
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CHECK(access_word(4*rail,4,0,&v)==DEVICE_OK);
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v|=1U<<static_bits[voter];
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CHECK(access_word(4*rail,4,1,&v)==DEVICE_OK);
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saved.pmc_enable[rail]|=1U<<static_bits[voter];
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CHECK(!memcmp(&state,&saved,sizeof(state)));
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}
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}
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for (unsigned rail=0;rail<4;rail++) CHECK(state.pmc_enable[rail]==0xb);
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uint64_t v=UINT64_MAX;
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CHECK(access_word(0x24,4,0,&v)==DEVICE_OK && v==0);
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v=(v&~3UL)|3;
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CHECK(access_word(0x24,4,1,&v)==DEVICE_OK);
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CHECK(access_word(0x24,4,0,&v)==DEVICE_OK && v==3);
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/* The stopped ANS stateChange enables boost bit 4. Independent
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* DISPEXT0 BWR bit 2 and later boost bits must preserve prior state. */
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v=0;
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CHECK(access_word(0x28,4,0,&v)==DEVICE_OK && v==0);
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v|=1U<<4;
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CHECK(access_word(0x28,4,1,&v)==DEVICE_OK);
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v=1U<<2;
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CHECK(access_word(0x20,4,1,&v)==DEVICE_OK);
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CHECK(access_word(0x28,4,0,&v)==DEVICE_OK && v==0x10);
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v|=1U<<2;
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CHECK(access_word(0x28,4,1,&v)==DEVICE_OK);
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CHECK(access_word(0x20,4,0,&v)==DEVICE_OK && v==4);
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CHECK(state.pmc_enable[4]==3 && state.pmc_enable[5]==0x14);
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unsigned words=0;
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for (unsigned off=0;off<0x1000;off+=4) {
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int index=-1;
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for (unsigned i=0;i<7;i++) if (off==offsets[i]) index=(int)i;
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v=0x13579bdf;saved=state;
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if (index<0) {
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for (int write=0;write<=1;write++) {
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CHECK(access_word(off,4,write,&v)==DEVICE_UNKNOWN_REGISTER);
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CHECK(v==0x13579bdf && !memcmp(&state,&saved,sizeof(state)));
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}
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continue;
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}
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words++;unsigned mask=masks[index];
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/* Every combination includes individual enable/disable, dynamic
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* GFX bit 2 and mixed settings. No vote data is produced. */
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for (unsigned pattern=0;pattern<=mask;pattern++) {
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v=pattern;saved=state;
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CHECK(access_word(off,4,1,&v)==DEVICE_OK);
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saved.pmc_enable[index]=pattern;
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CHECK(!memcmp(&state,&saved,sizeof(state)));
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v=UINT64_MAX;
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CHECK(access_word(off,4,0,&v)==DEVICE_OK && v==pattern);
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}
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for (unsigned bit=0;bit<64;bit++) {
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v=1UL<<bit;if (!(v&~(uint64_t)mask)) continue;
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v|=mask;uint64_t input=v;saved=state;
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CHECK(access_word(off,4,1,&v)==DEVICE_BAD_VALUE);
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CHECK(v==input && !memcmp(&state,&saved,sizeof(state)));
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}
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for (unsigned width=1;width<=16;width*=2) {
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if (width==4) continue;
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for (int write=0;write<=1;write++) {
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v=1;saved=state;
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CHECK(access_word(off,width,write,&v)==DEVICE_BAD_WIDTH);
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CHECK(v==1 && !memcmp(&state,&saved,sizeof(state)));
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}
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}
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for (unsigned delta=1;delta<=3;delta++) for (int write=0;write<=1;write++) {
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v=1;saved=state;
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CHECK(access_word(off+delta,4,write,&v)==DEVICE_BAD_WIDTH);
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CHECK(v==1 && !memcmp(&state,&saved,sizeof(state)));
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}
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}
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CHECK(words==7);
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CHECK(device_model_start(&model,&other,0,24000000)==DEVICE_OK);
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for (unsigned i=0;i<7;i++) CHECK(other.pmc_enable[i]==0);
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v=1;saved=state;
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CHECK(access_word(0x1000,4,1,&v)==DEVICE_NOT_FOUND);
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CHECK(device_model_access_state(&model,0,0,4,1,&v)==DEVICE_BAD_CONFIG);
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CHECK(device_model_access_state(&model,&state,0,4,1,0)==DEVICE_BAD_CONFIG);
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for (unsigned i=0;i<5;i++) {
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struct device_model bad=model;bad.config[i]=1;
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CHECK(!device_models_valid(&bad,1,0,0));
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CHECK(device_model_start(&bad,&state,0,24000000)==DEVICE_BAD_CONFIG);
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CHECK(device_model_access_state(&bad,&state,0,4,1,&v)==DEVICE_BAD_CONFIG);
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CHECK(!memcmp(&state,&saved,sizeof(state)));
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}
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struct device_model bad=model;bad.span=0x4000;
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CHECK(!device_models_valid(&bad,1,0,0));
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state.dram_policy=0xfeed;state.pmc_enable[0]=0xf;
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state.pmgr_policy[5]=0xfeedbeef;saved=state;
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for (unsigned i=0;i<7;i++) saved.pmc_enable[i]=0;
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CHECK(device_model_start(&model,&state,123,24000000)==DEVICE_OK);
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CHECK(!memcmp(&state,&saved,sizeof(state)));
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printf("PMC voter/RMBS/boost/BWR enable policy: %u checks passed\n",checks);
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return 0;
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}
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