Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
13 lines
577 B
C
13 lines
577 B
C
/* SPDX-License-Identifier: MIT */
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#ifndef SNAP_CPU_RELEASE_H
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#define SNAP_CPU_RELEASE_H
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#include <stdint.h>
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struct guest_cpu_release { uint64_t armed, issued; };
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/* A live backend accepts one release at a time. No reads or power-completion
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* values are fabricated. Offsets are relative to the PMGR CPU-start block;
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* global bits 1..5 map to E-cluster bits1..3 and P-cluster bits0..1. */
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int guest_cpu_release_write(struct guest_cpu_release *state,uint64_t allowed,
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uint64_t offset,unsigned width,uint64_t value,
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int (*launch)(void *,unsigned),void *context);
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#endif
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