Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
74 lines
2.9 KiB
C
74 lines
2.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/* Concurrent reader stress for the SPTM model's descriptor stores
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* (compat/sptm-access.h; tools/test-descriptor-stores.py).
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*
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* test-descriptor-stores STORE MILLIONS
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*
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* STORE is "bytes" (the helper every model file had until v67: eight volatile
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* byte stores, lowest first) or "put64" (sptm_put64). One thread writes a
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* table slot the way MAP_PAGE and UNMAP do (empty, then v67's leaf, then
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* empty again, and a second leaf whose high half differs) while another
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* reads it with single 64-bit loads, as the hardware walker does, and counts
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* every value it saw that was never written: a torn descriptor. Prints
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* "torn N of M reads" and exits 0; the caller decides what N must be. A
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* misaligned slot exercises the byte fallback for its value only. */
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#include <inttypes.h>
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#include <pthread.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "sptm-access.h"
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static void put_bytes_v67(volatile uint8_t *p, uint64_t v)
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{
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for (unsigned i = 0; i < 8; i++) p[i] = (uint8_t)(v >> (8 * i));
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}
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static _Alignas(64) volatile uint64_t slot[8];
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static volatile int done;
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static uint64_t reads, torn, last_torn;
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static uint64_t written[4];
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static void *reader(void *arg)
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{
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(void)arg;
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while (!__atomic_load_n(&done, __ATOMIC_ACQUIRE)) {
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uint64_t v = __atomic_load_n(&slot[0], __ATOMIC_RELAXED);
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reads++;
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if (v != written[0] && v != written[1] && v != written[2] && v != written[3]) {torn++; last_torn = v;}
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}
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return 0;
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}
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int main(int argc, char **argv)
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{
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if (argc != 3) {fprintf(stderr, "usage: test-descriptor-stores bytes|put64 MILLIONS\n"); return 2;}
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int old = !strcmp(argv[1], "bytes");
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if (!old && strcmp(argv[1], "put64")) return 2;
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uint64_t n = strtoull(argv[2], 0, 0) * 1000000;
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/* v67's leaf (OA 0x960e3f000, a user RW page) and one whose OA's high
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* half differs; empty slots between them, as an unmap and a map. */
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written[0] = 0;
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written[1] = UINT64_C(0x0060000960e3f7c3);
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written[2] = 0;
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written[3] = UINT64_C(0x00e000a5a5ce37c3);
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pthread_t t;
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if (pthread_create(&t, 0, reader, 0)) return 2;
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volatile uint8_t *p = (volatile uint8_t *)&slot[0];
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for (uint64_t i = 0; i < n; i++) {
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uint64_t v = written[i & 3];
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if (old) put_bytes_v67(p, v); else sptm_put64(p, v);
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}
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__atomic_store_n(&done, 1, __ATOMIC_RELEASE);
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pthread_join(t, 0);
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/* The byte fallback, misaligned, still writes the whole value. */
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volatile uint8_t *odd = (volatile uint8_t *)&slot[2] + 3;
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sptm_put64(odd, UINT64_C(0x0123456789abcdef));
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int fallback_ok = sptm_get64(odd) == UINT64_C(0x0123456789abcdef) &&
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sptm_get64((volatile uint8_t *)&slot[0]) == slot[0];
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printf("torn %" PRIu64 " of %" PRIu64 " reads (last %#" PRIx64 "); fallback %s\n",
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torn, reads, last_torn, fallback_ok ? "ok" : "WRONG");
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return fallback_ok ? 0 : 1;
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}
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