Acelogic
1510d8c6ce
An EL2 monitor/hypervisor and toolchain that boots macOS 27 on the ASUS A16 (Snapdragon X2 Elite), with an Adreno Metal plug-in and IOGPU kext, and air2ir3, an AIR to Mesa ir3 shader compiler. MIT, with GPL-2.0 components listed in LICENSE and THIRD_PARTY_NOTICES.md. No Apple, Qualcomm, ASUS or Microsoft binaries are included.
72 lines
3.6 KiB
C
72 lines
3.6 KiB
C
/* SPDX-License-Identifier: MIT */
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#include "ipi.h"
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#include "exception.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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static unsigned checks;
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#define CHECK(x) do { checks++; if(!(x)) { fprintf(stderr,"FAIL %d: %s\n",__LINE__,#x); exit(1); } } while(0)
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static void refused(struct guest_ipi *s,uint64_t mpidr,uint64_t reg,int read,
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uint64_t value,enum ipi_result result)
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{
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struct guest_ipi before=*s; uint64_t original=value;
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CHECK(guest_ipi_access(s,mpidr,reg,read,&value)==result);
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CHECK(!memcmp(s,&before,sizeof(*s)) && value==original);
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}
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int main(void)
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{
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for(unsigned cluster=0;cluster<256;cluster++) for(unsigned core=0;core<256;core+=17) {
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const uint64_t mpidr=0x80000000UL | (cluster<<8) | core;
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struct guest_ipi s={0}; uint64_t value=core;
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CHECK(guest_ipi_access(&s,mpidr,IPI_RR_LOCAL,0,&value)==IPI_OK);
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CHECK(s.pending==1 && s.requests==1 && s.coalesced==0);
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/* Reading pending, masking FIQ and disabling the timer cannot eat an IPI. */
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struct exception_step step={0}; uint64_t spsr=0x3c5,mdscr=0;
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exception_step_set(&step,1,&spsr,&mdscr);
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CHECK(!exception_step_fiq(&step,guest_ipi_fiq(&s,0)) && s.pending);
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exception_step_set(&step,0,&spsr,&mdscr);
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CHECK(exception_step_fiq(&step,guest_ipi_fiq(&s,0)));
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for(unsigned n=0;n<3;n++) {
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value=99;
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CHECK(guest_ipi_access(&s,mpidr,IPI_SR,1,&value)==IPI_OK && value==1);
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CHECK(s.pending && s.reads==n+1 && !s.acks);
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}
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value=((uint64_t)cluster<<16)|core;
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CHECK(guest_ipi_access(&s,mpidr,IPI_RR_GLOBAL,0,&value)==IPI_OK);
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CHECK(s.pending==1 && s.requests==2 && s.coalesced==1 && s.last_request==value);
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refused(&s,mpidr,IPI_RR_LOCAL,0,core^1,IPI_BAD_TARGET);
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refused(&s,mpidr,IPI_RR_GLOBAL,0,value^0x10000,IPI_BAD_TARGET);
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refused(&s,mpidr,IPI_RR_LOCAL,1,0,IPI_BAD_DIRECTION);
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refused(&s,mpidr,IPI_RR_GLOBAL,1,0,IPI_BAD_DIRECTION);
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for(unsigned bit=0;bit<64;bit++) {
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uint64_t mask=UINT64_C(1)<<bit;
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if(bit>7) refused(&s,mpidr,IPI_RR_LOCAL,0,core|mask,IPI_BAD_VALUE);
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if(bit>23 || (bit>=8 && bit<16))
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refused(&s,mpidr,IPI_RR_GLOBAL,0,value|mask,IPI_BAD_VALUE);
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if(bit) refused(&s,mpidr,IPI_SR,0,mask,IPI_BAD_VALUE);
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}
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value=0;
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CHECK(guest_ipi_access(&s,mpidr,IPI_SR,0,&value)==IPI_OK && s.pending && !s.acks);
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value=1;
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CHECK(guest_ipi_access(&s,mpidr,IPI_SR,0,&value)==IPI_OK);
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CHECK(!s.pending && s.acks==1);
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CHECK(guest_ipi_fiq(&s,1) && !guest_ipi_fiq(&s,0)); /* timer survives IPI ack */
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CHECK(guest_ipi_access(&s,mpidr,IPI_SR,0,&value)==IPI_OK && s.acks==1);
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CHECK(guest_ipi_access(&s,mpidr,IPI_SR,1,&value)==IPI_OK && value==0);
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value=core;
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CHECK(guest_ipi_access(&s,mpidr,IPI_RR_LOCAL,0,&value)==IPI_OK);
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CHECK(s.pending && s.requests==3 && s.coalesced==1); /* rearm after ack */
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}
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struct guest_ipi s={0}; uint64_t value=1;
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refused(&s,0,IPI_SR,2,value,IPI_BAD_CONFIG);
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refused(&s,0x10000,IPI_SR,0,value,IPI_BAD_CONFIG);
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refused(&s,UINT64_C(1)<<32,IPI_SR,0,value,IPI_BAD_CONFIG);
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refused(&s,0,0,0,value,IPI_UNHANDLED);
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CHECK(guest_ipi_access(NULL,0,IPI_SR,0,&value)==IPI_BAD_CONFIG);
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CHECK(guest_ipi_access(&s,0,IPI_SR,0,NULL)==IPI_BAD_CONFIG);
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s.pending=2;
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refused(&s,0,IPI_SR,1,value,IPI_BAD_CONFIG);
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CHECK(!guest_ipi_fiq(NULL,0) && guest_ipi_fiq(NULL,1));
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printf("PASS: %u fast IPI lifecycle, refusal and shared FIQ checks\n",checks);
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}
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